1
Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J: Passive elements in mram embedded integrated circuits. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, KING Robert L, March 8, 2007: WO/2007/027381 (108 worldwide citation)

An integrated circuit device (300) comprises a substrate (301) and MRAM architecture (314) formed on the substrate (308). The MRAM architecture (314) includes a MRAM circuit (318) formed on the substrate (301); and a MRAM cell (316) coupled to and formed above the MRAM circuit (318). Additionally a ...


2
Lien Mitchell T, Durlam Mark A, Meixner Thomas V, Wise Loren J: Magnetoresistive random access memory device structures and methods for fabricating the same. Freescale Semiconductor, Lien Mitchell T, Durlam Mark A, Meixner Thomas V, Wise Loren J, KING Robert L, May 11, 2006: WO/2006/049780 (4 worldwide citation)

Magnetoelectric memory element structures and methods for making such structures using a barrier layer as a material removal stop layer are provided. The methods comprise forming a digit line (26) disposed at least partially within a dielectric layer (24). The dielectic material layer overlies an in ...


3
Grynkewich Gregory, Deherrera Mark, Durlam Mark A, Tracy Clarence J: Magnetoresistive ram device and methods for fabricating. Freescale Semiconductor, Grynkewich Gregory, Deherrera Mark, Durlam Mark A, Tracy Clarence J, KING Robert L, November 4, 2004: WO/2004/095459

A method for fabricating an MRAM device structure (10) includes providing a substrate (12) on which is formed a first transistor (14) and a second transistor (14). An operative memory element device (60) is formed in electrical contact with the first transistor (14). At least a portion of a false me ...


4
Grynkewich Gregory W, Butcher Brian R, Durlam Mark A, Kyler Kelly, Snyder Charles A, Smith Kenneth H, Tracy Clarence J, Williams Richard: Methods for contracting conducting layers overlying magnetoelectronic elements of mram devices. Freescale Semiconductor, Grynkewich Gregory W, Butcher Brian R, Durlam Mark A, Kyler Kelly, Snyder Charles A, Smith Kenneth H, Tracy Clarence J, Williams Richard, KING Robert L, November 4, 2004: WO/2004/095515

A method for contacting an electrically conductive layer overlying a magnetoelectronics element includes forming a memory element layer overlying a dielectric region. A first electrically conductive layer (26) is deposited overlying the memory element layer (18). A first dielectric layer (28) is dep ...


5
Kerszykowski Gloria J, Chang Li Hsin, Durlam Mark A, Lien Mitchell T, Meixner Thomas V, Wise Loren J: Mram device integreated with other circuitry. Freescale Semiconductor, Kerszykowski Gloria J, Chang Li Hsin, Durlam Mark A, Lien Mitchell T, Meixner Thomas V, Wise Loren J, KING Robert L, July 7, 2005: WO/2005/060439

A magnetoresistive random access memory (MRAM) (13) is embedded with another circuit type (12). Logic (12), such as a processing unit, is particularly well-suited circuit type for embedding with MRAM (13). The embedding is made more efficient by using a metal layer (26) that is used as part of the i ...


6
Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, Zuo Jiang Kai: Magnetic tunnel junction current sensors. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, Zuo Jiang Kai, KING Robert L, May 10, 2007: WO/2007/053340

An integrated circuit device (600) is provided which includes an active circuit component (604, 804) and a current sensor (602, 802). The active circuit component (604, 804) may be coupled between a first conductive layer (206) and a second conductive layer (210), and is configured to produce a firs ...


7
Chung Young Sir, Baird Robert W, Durlam Mark A: Methods of implementing magnetic tunnel junction current sensors. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, KING Robert L, May 10, 2007: WO/2007/053341

An integrated circuit device (800) is provided which comprises a substrate (801), a conductive line (807) configured to experience a pressure, and a magnetic tunnel junction ('MTJ') core (802) formed between the substrate and the current line. The conductive line (807) is configured to move in respo ...


8
Chung Young Sir, Baird Robert W, Durlam Mark A: Magnetic tunnel junction temperature sensors. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, KING Robert L, April 12, 2007: WO/2007/041007

An integrated circuit device (600) is provided which includes a heat source (604) disposed in a substrate (602), and a Magnetic Tunnel Junction ('MTJ') temperature sensor (608) disposed over the heat source.


9
Chung Young Sir, Baird Robert W, Durlam Mark A: Magnetic tunnel junction temperature sensors and methods. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, KING Robert L, April 12, 2007: WO/2007/040991

Techniques of sensing a temperature of a heat source disposed in a substrate of an integrated circuit (600) are provided. According to one exemplary method, a Magnetic Tunnel Junction ('MTJ') temperature sensor (608) is provided over the heat source (604). The MTJ temperature sensor comprises an MTJ ...


10
Chung Young Sir, Baird Robert W, Durlam Mark A, Engel Bradley N: 3-d inductor and transformer devices in mram embedded integrated circuits. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Engel Bradley N, KING Robert L, December 14, 2006: WO/2006/132750

An integrated circuit device (300) includes a magnetic random access memory ('MRAM') architecture (310) and at least one inductance element (3 12, 3 14) formed on the same substrate using the same fabrication process technology. The inductance element, which may be an inductor or a transformer, is f ...



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