1
Seymour R Cray Jr: Computer vector register processing. Cray Research, Merchant Gould Smith Edell Welter & Schmidt, December 5, 1978: US04128880 (269 worldwide citation)

Vector processing in a computer is achieved by means of a plurality of vector registers, a plurality of independent fully segmented functional units, and means for controlling the operation of the vector registers. Operations are performed on data from vector register to functional unit and back to ...


2
Thorbjorn Vynne, Frederic Jordan: Embedding a digital signature in a video sequence. Cray Research, Schwegman Lundberg Woessner and Kluth P A, September 28, 1999: US05960081 (266 worldwide citation)

Method and apparatus for watermarking digital video material by embedding a digital signature. One embodiment of the system integrates the embedding procedure into a block-based compression scheme. In one embodiment, a 32-bit digital signature is embedded into the x- and y-coordinates of motion vect ...


3
Richard E Kessler, Steven M Oberlin, Steven L Scott: Messaging in distributed memory multiprocessing system having shell circuitry for atomic control of message storage queues tail pointer structure in local memory. Cray Research, Schwegman Lundberg Woessner and Kluth P A, November 24, 1998: US05841973 (154 worldwide citation)

A messaging facility in a multiprocessor computer system includes assembly circuitry in a source processing element for assembling a message to be sent from the source processing element to a destination processing element based on information provided from a processor in the source processing eleme ...


4
Randal S Passint, Steven M Oberlin, Eric C Fromm: Messaging facility with hardware tail pointer and software implemented head pointer message queue for distributed memory massively parallel processing system. Cray Research, Schwegman Lundberg Woessner & Kluth P A, December 3, 1996: US05581705 (137 worldwide citation)

A messaging facility is described that enables the passing of packets of data from one processing element to another in a globally addressable, distributed memory multiprocessor without having an explicit destination address in the target processing element's memory. The messaging facility can be us ...


5
Richard E Kessler, Steven M Oberlin, Steven L Scott: Massively parallel processing system using two data paths: one connecting router circuit to the interconnect network and the other connecting router circuit to I/O controller. Cray Research, Schwegman Lundberg Woessner and Kluth P A, January 26, 1999: US05864738 (130 worldwide citation)

A system and method of transferring information between a peripheral device and an MPP system having an interconnect network and a plurality of processing nodes. Each processing element includes a processor, local memory and a router circuit connected to the interconnect network, the processor and t ...


6
Timothy J Johnson: Raid-5 parity generation and data reconstruction. Cray Research, Schwegman Lundberg Woessner & Kluth P A, September 8, 1998: US05805788 (123 worldwide citation)

A system for implementing RAID-5 parity generation and reconstruction. Data for an array of disk drives is placed in an I/O buffer. The RAID-5 parity engine creates parity data and stores the resulting parity data in the I/O buffer as well. The I/O buffer (both the data and the parity) is then secto ...


7
Robert J Halford: Single disk emulation interface for an array of synchronous spindle disk drives. Cray Research, Merchant Gould Smith Edell Welter & Schmidt, July 7, 1992: US05128810 (108 worldwide citation)

A multiple disk drive array storage device is described which emulates the operation of a single disk drive so that the handshaking and protocol between the array storage device and the host computer appears to the host computer to be that of a single disk drive. The array storage device includes a ...


8
Gregory G Gaetner, George A Spix, Diane M Wengelski, Keith J Thompson: System having integrated dispatcher for self scheduling processors to execute multiple types of processes. Cray Research, Schwegman Lundberg & Woessner, September 19, 1995: US05452452 (107 worldwide citation)

Method for enabling each of several processors in a multi-processing operating system to schedule processes it will execute without a supervisory scheduler. The processes are executed on the basis of priorities assigned to the processes. More than one processor can schedule processes simultaneously ...


9
Bradley W Bartilson: Large area, multi-device heat pipe for stacked MCM-based systems. Cray Research, Schwegman Lundberg Woessner & Kluth P A, April 25, 2000: US06055157 (102 worldwide citation)

The invention is a computer module for scalably adding computing power and cooling capacity to a computer system. Computing power can be added by merely adding additional printed circuit cards to the computing module. Cooling capability is added by adding heat pipes to the computer module. The compu ...


10
Melvin C August, John T Williams: Circuit module with enhanced heat transfer and distribution. Cray Research, Merchant Gould Smith Edell Welter & Schmidt, December 9, 1986: US04628407 (101 worldwide citation)

A circuit module (10) having enhanced heat transfer and distribution characteristics which is particularly adapted for use in high speed electronic digital computers. The circuit module (10) includes a circuit board assembly (12) with a plurality of electronic devices (26) such as integrated circuit ...