1
Yonggill Lee: Stacked package structure. Advanced Semiconductor Engineering, Thomas Kayden Horstemeyer & Risley, July 10, 2007: US07242081 (269 worldwide citation)

A stacked package structure and a method for manufacturing the same are disclosed. The package structure comprises: a substrate having a first surface and a second surface in opposition to each other; at least one chip deposed on and electrically connected to the first surface of the substrate; a pl ...


2
Alex Fan, Daniel Chen, Rick Chiu, Jack Kuo, Roger Chiu, Jim Li: Leadless semiconductor package. Advanced Semiconductor Engineering, Dykema Gossett PLLC, June 4, 2002: US06400004 (230 worldwide citation)

A leadless semiconductor package mainly comprises a semiconductor chip disposed on a die pad and electrically connected to a plurality of leads arranged around the die pad. There are a plurality of tie bars connected to the die pad. The lower surface of each lead has an indentation formed correspond ...


3
Chun Chi Lee, Kao Yu Hsu: Method of making semiconductor chip package. Advanced Semiconductor Engineering, September 18, 2001: US06291271 (181 worldwide citation)

A method of making a semiconductor chip package utilizes a film carrier to support a semiconductor chip. The method comprises the steps of: forming a plurality of through-holes in a film carrier; laminating a metal layer on the film carrier; etching the metal layer to form a die pad and a plurality ...


4
Chun Hung Lin: Low-pin-count chip package and manufacturing method thereof. Advanced Semiconductor Engineering, May 29, 2001: US06238952 (150 worldwide citation)

A low-pin-count chip package including a die pad for receiving a semiconductor chip and a plurality of connection pads electrically coupled to the semiconductor chip wherein the die pad and the connection pads have a concave profile. A package body is formed over the semiconductor chip, the die pad ...


5
Min Lung Huang: Semiconductor device having bump electrode. Advanced Semiconductor Engineering, Dykema Gossett PLLC, September 17, 2002: US06452270 (121 worldwide citation)

A semiconductor device having bump electrodes mainly comprises a specialized under bump metallurgy (UBM) applied to a chip with copper contact pads. Typically, the chip comprises a substrate and at least one copper contact pad on the substrate. A passivation layer is formed over the substrate and ha ...


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Yen Yi Wu, Wei Yueh Sung, Pao Huei Chang Chien, Chi Chih Chu, Cheng Yin Lee, Gwo Liang Weng: Method of making a semiconductor package and method of making a semiconductor device. Advanced Semiconductor Engineering, Cooley Godward Kronish, January 5, 2010: US07642133 (104 worldwide citation)

The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electri ...


8
Sheng Tsung Liu: Substrate with reinforced contact pad structure. Advanced Semiconductor Engineering, Troxell Law Office PLLC, February 28, 2006: US07005750 (98 worldwide citation)

A substrate with reinforced contact pad structure includes a metal wiring layer and a solder mask formed over its surface. The metal wiring layer includes at least a NSMD (Non-Solder Mask Defined) type contact pad, a trace and an extension. The extension connects the contact pad and the trace, and h ...


9
Gwo Liang Weng, Shih Chang Lee, Cheng Yin Lee: Chip package structure and manufacturing method thereof. Advanced Semiconductor Engineering, Jianq Chyun IP Office, June 13, 2006: US07061079 (97 worldwide citation)

The present invention provides a chip package structure and the manufacturing method thereof, which affords higher heat dissipation efficiency and is suitable to fabricate the stack type package structure with a higher integration. The chip package structure comprises a carrier, at least a chip, a h ...


10
Chi Chih Shen, Jen Chuan Chen, Wen Hsiung Chang, Chi Chih Chu, Cheng Yi Weng: Method for forming stackable semiconductor device packages including openings with conductive bumps of specified geometries. Advanced Semiconductor Engineering, Cooley, September 6, 2011: US08012797 (92 worldwide citation)

In one embodiment, a manufacturing method includes: (1) applying a first electrically conductive material to an upper surface of a substrate to form first conductive bumps; (2) electrically connecting a semiconductor device to the upper surface of the substrate; (3) applying a molding material to fo ...