51
Valery M Dubin: Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure. Advanced Micro Devices, Monica H Choi, June 20, 2000: US06077780 (163 worldwide citation)

A method for filling, with a conductive material, a high aspect ratio opening such as a via hole or a trench opening within an integrated circuit minimizes the formation of voids and seams. This conductive material such as copper which fills the high aspect ratio opening is amenable for fine line me ...


52
Anthony John Toprac, Douglas John Downey, Subhash Gupta: Run-to-run control process for controlling critical dimensions. Advanced Micro Devices, Ken J Koestner, Skjerven Morrill MacPherson Franklin & Friel, July 20, 1999: US05926690 (163 worldwide citation)

It has been discovered that all causes of critical dimension variation, both known and unknown, are compensated by adjusting the time of photoresist etch. Accordingly, a control method employs a control system using photoresist etch time as a manipulated variable in either a feedforward or a feedbac ...


53
Richard J Huang, Philip A Fisher, Cyrus E Tabery: Use of diamond as a hard mask material. Advanced Micro Devices, Foley & Lardner, January 6, 2004: US06673684 (163 worldwide citation)

A method for producing an integrated circuit includes providing a diamond layer above a layer of conductive material. A cap layer is provided above the diamond layer and patterned to form a cap feature. The diamond layer is patterned according to the cap feature to form a mask, and at least a portio ...


54
Bin Yu: Fabrication of a field effect transistor with a recess in a semiconductor pillar in SOI technology. Advanced Micro Devices, Monica H Choi, May 13, 2003: US06562665 (162 worldwide citation)

For fabricating a field effect transistor, a pillar of semiconductor material is formed, a recess is formed in the top surface of the pillar along the length of the pillar, a gate dielectric material is deposited on any exposed surface of the semiconductor material of the pillar including at the top ...


55
Stephan G Meier, Norbert Juffa, Michael D Achenbach, Frederick D Weber: Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction. Advanced Micro Devices, Lawrence J Merkel, Conley Rose & Tayon P C, August 15, 2000: US06105129 (160 worldwide citation)

A microprocessor includes one or more registers which are architecturally defined to be used for at least two data formats. In one embodiment, the registers are the floating point registers defined in the x86 architecture, and the data formats are the floating point data format and the multimedia da ...


56
Robert Alan Williams, Mohan Kalkunte: Apparatus and method for selectively controlling transmission of consecutive packets in a network station. Advanced Micro Devices, April 25, 2000: US06055578 (158 worldwide citation)

Delay times are modified in an Ethernet network device having captured the media channel by increasing the interframe spacing (IFS) between data packets. The modified IFS interval, increased by adding a delay interval to the minimum interpacket gap (IPG) interval after a first user-selectable number ...


57
Terry Lynn Cole: Location-based reminders. Advanced Micro Devices, Hamilton & Terrile, Michael Rocco Cannatti, August 1, 2006: US07084758 (158 worldwide citation)

A mobile computing device, such as a personal digital assistant (PDA) or smart phone (102), is equipped with a location detector, such as a WLAN transceiver (112) or global positioning system (GPS) receiver (134), and is programmed with a condition detection program (145) by the user to suppress or ...


58
Zhigang Wang, Xin Guo, Yue Song He: Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling. Advanced Micro Devices, Renner Otto Boisselle & Sklar, September 9, 2003: US06617639 (156 worldwide citation)

A floating gate flash memory device including a substrate comprising a source region, a drain region, and a channel region positioned therebetween; a floating gate electrode positioned above the channel region and separated from the channel region by a tunnel dielectric material layer; and a control ...


59
Takeshi Nogami, Sergey Lopatin, Young Chang Joo: Method of forming copper/copper alloy interconnection with reduced electromigration. Advanced Micro Devices, June 5, 2001: US06242349 (155 worldwide citation)

The electromigration of a Cu or Cu alloy interconnection member is reduced by annealing the seed layer before electroplating or electroless plating the Cu or Cu alloy interconnection member on the seed layer. Embodiments include depositing a Cu or Cu alloy seed layer, annealing at about 100° C. to a ...


60
Michael K Templeton, Ramkumar Subramanian, Bharath Rangarajan, Kathleen R Early, Ursula Q Quinto: Chemical feature doubling process. Advanced Micro Devices, Amin & Turocy, March 18, 2003: US06534243 (154 worldwide citation)

In one embodiment, the present invention relates to a method of treating a patterned resist involving providing the patterned resist having a first number of structural features, the patterned resist comprising an acid catalyzed polymer; contacting a coating containing a coating material, at least o ...



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