41
Valery Dubin, Chiu Ting, Robin W Cheung: Pulse electroplating copper or copper alloys. Advanced Micro Devices, October 26, 1999: US05972192 (170 worldwide citation)

High aspect ratio openings in excess of 3, such as trenches, via holes or contact holes, in a dielectric layer are voidlessly filled employing a pulse or forward-reverse pulse electroplating technique to deposit copper or a copper-base alloy. A leveling agent is incorporated in the electroplating co ...


42
Alfred C Hartmann: Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip. Advanced Micro Devices, Robert C Kowert, Jeffrey C Hood, Conley Rose & Tayon P C, August 1, 2000: US06096091 (170 worldwide citation)

An integrated circuit comprising a plurality of reconfigurable logic networks, one or more buffers, a configuration control network, and an embedded processor, all comprised as an integral part of the integrated circuit, and a method of operation of the integrated circuit. One or more of the buffers ...


43
Arvind Halliyal, Mark T Ramsbey, Wei Zhang, Mark W Randolph, Fred T K Cheung: Use of high-K dielectric material in modified ONO structure for semiconductor devices. Advanced Micro Devices, Renner Otto Boisselle & Sklar, November 4, 2003: US06642573 (170 worldwide citation)

A process for fabrication of a semiconductor device including a modified ONO structure, comprising forming the modified ONO structure by providing a semiconductor substrate; forming a first dielectric material layer on the semiconductor substrate; depositing a silicon nitride layer on the first diel ...


44
Matthew S Buynoski, Srikanteswara Dakshina Murthy, Cyrus E Tabery, Haihong Wang, Chih Yuh Yang, Bin Yu: Method for forming fins in a FinFET device using sacrificial carbon layer. Advanced Micro Devices, Harrity & Snyder L, November 11, 2003: US06645797 (170 worldwide citation)

A method for forming a fin in a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, includes forming a carbon layer over the conductive layer and forming a mask over the carbon layer. The method further i ...


45
Jack Sliwa, Mohammad Farnaam, Pankaj Dixit, Lewis N Shen: High speed interconnect system with refractory non-dogbone contacts and an active electromigration suppression mechanism. Advanced Micro Devices, Ashen Golant Martin & Seldon, July 11, 1989: US04847674 (168 worldwide citation)

An interconnect (16', 18', 18"), whose interlevel contacts comprise refractory (10) to refractory or refractory to semiconductor substrate (13) interfaces, comprises patterned refractory core portions (10), consisting of tungsten or molybdenum, having top portions (10a) and opposed side portions (10 ...


46
Lawrence H Zuckerman: Apparatus and method for receiving a modulated radio frequency signal by converting the radio frequency signal to a very low intermediate frequency signal. Advanced Micro Devices, Foley & Lardner, September 1, 1998: US05802463 (168 worldwide citation)

A very low intermediate frequency (IF) transceiver is described for use in a wireless LAN, cellular telephone, cordless telephone, and other radio transceiver applications. The transceiver preferably directly down-converts the RF signal to lower frequency such as a very low IF signal, which can be h ...


47
Russell W Bell: Device and method for isolating voice and data signals on a common carrier. Advanced Micro Devices, Merchant Gould Smith Edell Welter & Schmidt P A, July 27, 1999: US05930340 (166 worldwide citation)

A device and system for isolating voice and data signals transmitted on an internal telephone wire network is disclosed. The device further includes voice and/or data connectors coupled to the network. One or more filters are coupled between the network and the voice and data connectors to respectiv ...


48
Valery M Dubin: Method for filling high aspect ratio openings of an integrated circuit to minimize electromigration failure. Advanced Micro Devices, Monica H Choi, June 20, 2000: US06077780 (165 worldwide citation)

A method for filling, with a conductive material, a high aspect ratio opening such as a via hole or a trench opening within an integrated circuit minimizes the formation of voids and seams. This conductive material such as copper which fills the high aspect ratio opening is amenable for fine line me ...


49
Unsoon Kim, Hung Sheng Chen, Kashmir Sahota, Yu Sun: Core array and periphery isolation technique. Advanced Micro Devices, Foley & Lardner, December 21, 1999: US06004862 (165 worldwide citation)

A process for forming a semiconductor integrated circuit with a core area densely populated with active devices and with a periphery area less densely populated with active devices as compared to the core area, comprising the steps of: forming a first layer of first insulator material above a semico ...


50
Sergey D Lopatin, Carl Galewski, Takeshi T N Nogami: Method of copper interconnect formation using atomic layer copper deposition. Advanced Micro Devices, Genus, LaRiviere Grubman & Payne, April 9, 2002: US06368954 (164 worldwide citation)

A semiconductor interconnect structure having a substrate with an interconnect structure patterned thereon, a barrier layer, a pre-seed layer, a seed layer, a bulk interconnect layer, and a sealing layer. A process for creating such structures is described. The barrier layer is formed using atomic l ...



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