A method for forming a semiconductor device (10) includes forming a recess (26) in a source region and a recess (28) in a drain region of the semiconductor device. The method further includes forming a first semiconductor material layer (32) in the recess (26) in the source region and a second semiconductor material layer (34) in the recess (28) in the drain region, wherein each of the first semiconductor material layer (32) and the second semiconductor material layer (38) are formed using a stressor material having a first ratio of an atomic concentration of a first element and an atomic concentration of a second element, wherein the first element is silicon and a first level of concentration of a doping material. The method further includes forming additional semiconductor material layers (36, 38, 40, 42) overlying the first semiconductor material layer (32) and the second semiconductor material layer (34) that have a different ratio of the atomic concentration of the first element and the second element.

Title
Multi-layer source/drain stressor
Application Number
PCT/US2008/051844
Publication Number
2008/103517
Application Date
January 24, 2008
Publication Date
August 28, 2008
Inventor
Lee Thomas H
Deherrera Mark F
Salter Eric J
Agent
KING Robert L
Assignee
Lee Thomas H
Deherrera Mark F
Salter Eric J
Freescale Semiconductor
IPC
H01L 21/265
H01L 29/78
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