3903590 is referenced by 110 patents and cites 4 patents.

In a multiple chip integrated circuit, a plurality of semiconductor chips each carrying contact electrodes are partially embedded in a metal substrate and a dielectric layer is overlaid on the substrate with the semiconductor chips projected through windows of the dielectric layer. A first conductive layer is formed on the dielectric layer in a predetermined pattern and a layer of thermoplastic resin formed with windows is applied to cover the first conductive layer and the semiconductor chips. A second conductive layer of a predetermined pattern is applied on the layer of thermoplastic resin for electrically connecting the contact electrodes on the semiconductor chips to the first conductive layer through the windows of the layer of thermoplastic resin.

Multiple chip integrated circuits and method of manufacturing the same
Application Number
Publication Number
Application Date
March 7, 1974
Publication Date
September 9, 1975
Yokogawa Syunzi
Cushman Darby & Cushman
Tokyo Shibaura Electric
H01L 07/68
H01L 01/24
H01L 01/16
B01J 17/00
H01L 23/538
H01L 21/58
H01L 23/36
H01L 23/14
H01L 21/02
H01L 23/373
H01L 23/12
H01L 23/52
H01L 23/34
H01L 21/60
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