A data processor for a time division multiplexed communications system. A plurality of such data processors are connected in series in a loop configuration, each having a data terminal associated therewith, for establishing a connection between data processors in a time division multiplexed channel. Each data processor demodulates the signal on the loop, extracts timing information from the loop signal and locates the channel to be used for establishing the connection between itself and another data processor. Each data processor in addition, regenerates and passes on data not intended for that data processor. Data found in the correct or selected channel is provided to the data terminal which may be a synchronous or an asynchronous device. Data from the terminal is inserted into the selected channel, modulated in accordance with a particular rule and transmitted onto the loop to another data processor operating in the selected channel.