3875391 is referenced by 131 patents and cites 4 patents.

A signal processor including a programmable arithmetic controller and a pipeline arithmetic unit controlled by such controller is disclosed. The arithmetic unit includes a plurality of serially coupled processing levels. The arithmetic controller includes a corresponding plurality of serially coupled control levels, each one of such control levels being coupled to a corresponding one of the processing levels. Each one of the processing levels passes digital data applied thereto in accordance with a control instruction applied to such processing level by the arithmetic controller. As data passes through the various processing levels, the control instruction associated with such data passes through the corresponding control level so that such control instruction 'follows' such data as both data and control instruction pass through the processor. In this way the processor is adapted to start a new process concurrently as such processor completes a prior process.

Pipeline signal processor
Application Number
Publication Number
Application Date
November 2, 1973
Publication Date
April 1, 1975
Sobel Herbert S
Shapiro Gerald N
Pannone Joseph D
McFarland Philip J
Sharkansky Richard M
Raytheon Company
G06f 15/00
G06f 07/38
G06F 09/38
G06F 17/10
G05B 19/414
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