3787673 is referenced by 72 patents and cites 4 patents.

A digital computer central processing unit is disclosed having an arithmetic unit which forms an element of an instruction processing pipeline. The arithmetic unit has within it a plurality of arithmetic subunits each with its own storage and partitioned on a functional basis for the simultaneous execution of a plurality of arithmetic steps within the arithmetic unit while a plurality of instructions are simultaneously processed in their flow to the arithmetic unit. The sections of the arithmetic unit are accessible to operand input channels, the arithmetic unit further being partitioned for simultaneous single length operand execution or for double length operand execution.

Title
Pipelined high speed arithmetic unit
Application Number
05/248,690
Publication Number
3787673
Application Date
April 28, 1972
Publication Date
January 22, 1974
Inventor
Stephenson Charles M
Watson William J
Assignee
Texas Instruments Incorporated
IPC
G06f 07/38
G06F 09/38
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