3766527 is referenced by 25 patents and cites 16 patents.

Program control apparatus in which current instruction execution and next instruction fetch occur in overlapped time periods during one instruction cycle. The results of a previous instruction execution are employed to set or not set selected ones of a plurality of condition latches in accordance with a current instruction. The current instruction also includes a test code which when combined in a decoding network with the outputs of the latches will produce a selection signal to a next instruction address multiplexer. The multiplexer will respond thereto to selectively couple one of plural instruction address sources to an instruction address buss. The program control apparatus also includes means responsive to a current instruction test code and the outputs of the condition latches to enable or to inhibit the storage of the results of an instruction execution.

Program control apparatus
Application Number
Publication Number
Application Date
October 1, 1971
Publication Date
October 16, 1973
Briley Joseph C
Sanders Associates
G06f 09/18
G06F 09/38
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