3739352 is referenced by 44 patents and cites 4 patents.

There is described a microprogrammed processor associated with a free field memory in which operands of any length in terms of the number of bits can be processed. The free field memory is addressed by an address register that points to the boundary between any two bits stored in the memory as the start of a field and that specifies the number of bits in the field up to the maximum bit capacity of the memory. A control register, referred to as a bias register, determines the number of bits in parallel, up to a maximum number of parallel bits accommodated by one memory cycle, required in the execution of particular microinstructions. Any microoperator string involving the manipulation of operands, such as an arithmetic operation or a data transfer operation, includes a bias operation in which the bias register is set to the lesser of the number of bits specified by the address register and the maximum number of bits transferred in one memory cycle. Once the bias register is set, it is used to control internal operations within the processor and transfers between the processor and memory as though the basic width of the machine had been changed.

Variable word width processor control
Application Number
Publication Number
Application Date
June 28, 1971
Publication Date
June 12, 1973
Packard Roger E
Burroughs Corporation
G06f 09/00
G06F 09/318
G06F 12/04
G06F 09/26
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