A memory system is disclosed for use in a multiprocessing environment where each processor has associated with it a buffer memory and means are provided for one buffer to retain a modified copy of data. The contents of the buffer memory may be accessed by either real or logical addresses. Address translation means are provided to translate logical addresses. A fetch directory is provided to keep track of the data in cache. The fetch directory entries are accessed by both logical and real portions of the desired data address. Means are provided to insure that only one copy of data is maintained in the buffer although it may be entered at several cache locations dependent upon the logical address which last fetched the data.