3723976 is referenced by 110 patents and cites 2 patents.

A memory system is disclosed for use in a multiprocessing environment where each processor has associated with it a buffer memory and means are provided for one buffer to retain a modified copy of data. The contents of the buffer memory may be accessed by either real or logical addresses. Address translation means are provided to translate logical addresses. A fetch directory is provided to keep track of the data in cache. The fetch directory entries are accessed by both logical and real portions of the desired data address. Means are provided to insure that only one copy of data is maintained in the buffer although it may be entered at several cache locations dependent upon the logical address which last fetched the data.

Title
Memory system with logical and real addressing
Application Number
05/219,362
Publication Number
3723976
Application Date
January 20, 1972
Publication Date
March 27, 1973
Inventor
Barner Jr Robert P
Alvarez Joseph A
Assignee
International Business Machines Corporation
IPC
G06f 03/00
G06F 12/08
G06F 12/10
View Original Source