A data processing system includes a central processing unit which uses virtual addressing in address control words to access a high speed buffer store of limited storage capacity and simultaneously to access a high capacity main store of slower operating speed, whereby no time is lost in accessing the main store in the event the buffer store cannot be accessed. If the buffer store can be accessed, then a sector address register and a particular associative register in an array must compare with address control information in the address control word. Each sector address register has a link register the content of which identifies the particular associative register which must compare simultaneously with the address control information. Any sector address register may be linked to any associative register in the array by changing the content of the associated link register accordingly. Thus information from any part of the main store may be stored in any part of the buffer store by using this virtual addressing arrangement.