3693165 is referenced by 79 patents and cites 3 patents.

A data processing system includes a central processing unit which uses virtual addressing in address control words to access a high speed buffer store of limited storage capacity and simultaneously to access a high capacity main store of slower operating speed, whereby no time is lost in accessing the main store in the event the buffer store cannot be accessed. If the buffer store can be accessed, then a sector address register and a particular associative register in an array must compare with address control information in the address control word. Each sector address register has a link register the content of which identifies the particular associative register which must compare simultaneously with the address control information. Any sector address register may be linked to any associative register in the array by changing the content of the associated link register accordingly. Thus information from any part of the main store may be stored in any part of the buffer store by using this virtual addressing arrangement.

Parallel addressing of a storage hierarchy in a data processing system using virtual addressing
Application Number
Publication Number
Application Date
June 29, 1971
Publication Date
September 19, 1972
Richcreek James T
Reiley Forrest A
International Business Machines Corporation
G06f 13/00
G11c 09/00
G06F 12/10
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