09941245 is referenced by 31 patents and cites 126 patents.

In some embodiments, integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate are presented. In this regard, an apparatus is introduced having a first element including a microelectronic die having an active surface and at least one side, an encapsulation material adjacent said at least one microelectronic die side, wherein said encapsulation material includes at least one surface substantially planar to said microelectronic die active surface, a first dielectric material layer disposed on at least a portion of said microelectronic die active surface and said encapsulation material surface, a plurality of build-up layers disposed on said first dielectric material layer, and a plurality of conductive traces disposed on said first dielectric material layer and said build-up layers and in electrical contact with said microelectronic die active surface; and a second element coupled to the first element, the second element including a substrate having a plurality of dielectric material layers and conductive traces to conductively couple conductive contacts on a top surface with conductive contacts on a bottom surface, said conductive contacts on said top surface conductively coupled with said conductive traces of said first element. Other embodiments are also disclosed and claimed.

Title
Integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate
Application Number
11/860922
Publication Number
9941245 (B2)
Application Date
September 25, 2007
Publication Date
April 10, 2018
Inventor
John Guzek
Chandler
AZ, US
Ravi Mahajan
Chandler
AZ, US
Oswald Skeete
Phoenix
AZ, US
Agent
Schwegman Lundberg & Woessner P A
Assignee
Intel Corporation
CA, US
IPC
H01L 23/00
H01L 23/498
H01L 23/31
H01L 21/56
H01L 25/16
H01L 25/10
H01L 23/538
H01L 25/065
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