09747983 is referenced by 13 patents and cites 191 patents.

A semiconductor memory cell includes a floating body region configured to be charged to a level indicative of a state of the memory cell; a first region in electrical contact with said floating body region; a second region in electrical contact with said floating body region and spaced apart from said first region; and a gate positioned between said first and second regions. The cell may be a multi-level cell. Arrays of memory cells are disclosed for making a memory device. Methods of operating memory cells are also provided.

Title
Semiconductor device having electrically floating body transistor, semiconductor device having both volatile and non-volatile functionality and method of operating
Application Number
15/436641
Publication Number
9747983 (B2)
Application Date
February 17, 2017
Publication Date
August 29, 2017
Inventor
Yuniarto Widjaja
Cupertino
CA, US
Agent
Law Office of Alan W Cannon
Assignee
Zeno Semiconductor
CA, US
IPC
G11C 16/04
G11C 11/404
H01L 27/11524
H01L 27/108
H01L 29/788
H01L 29/78
G11C 14/00
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