09235467 is referenced by 5 patents and cites 69 patents.

A nonvolatile memory storage controller for delivering log likelihood ratios (LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC encoded codeword. The controller includes partitioning circuitry for identifying a set of soft-decision reference voltages having the smallest calculated introduced error value based upon the estimated BER of the nonvolatile memory. The controller further includes read circuitry for reading an LDPC encoded codeword stored in a nonvolatile memory storage module using the set of soft-decision reference voltages having the smallest calculated LLR introduced error value to provide a plurality of soft-decision bits representative of the codeword. The controller further includes an LLR look-up table accessible by the read circuitry to provide LLRs to the LDPC decoder for the subsequent decoding of the codeword.

Title
System and method with reference voltage partitioning for low density parity check decoding
Application Number
14/165135
Publication Number
9235467 (B2)
Application Date
January 27, 2014
Publication Date
January 12, 2016
Inventor
Peter Z Onufryk
Flanders
NJ, US
Alessia Marelli
Dalmine
IT
Rino Micheloni
Turate
IT
Agent
Glass & Associates
Molly Sauter
Kenneth Glass
Assignee
PMC SIERRA US
CA, US
IPC
H03M 13/37
H03M 13/11
G06F 11/10
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