09218852 is referenced by 1 patents and cites 43 patents.

An apparatus includes a first semiconductor device including a memory core. The apparatus also includes a second semiconductor device including periphery circuitry associated with the memory core. The second semiconductor device includes a second serializer/deserializer communication interface coupled to a first serializer/deserializer communication interface of a memory controller.

Title
Smart bridge for memory core
Application Number
13/247592
Publication Number
9218852 (B2)
Application Date
September 28, 2011
Publication Date
December 22, 2015
Inventor
Deepak Pancholi
Bangalore
IN
Radhakrishnan Nair
Kerala
IN
Dimitris Pantelakis
Santa Clara
CA, US
Stephen Skala
Fremont
CA, US
Manuel Antonio D Abreu
El Dorado Hills
CA, US
Agent
Toler Law Group PC
Assignee
SANDISK TECHNOLOGIES
TX, US
IPC
G11C 29/04
G11C 16/26
G11C 16/10
G11C 14/00
G06F 11/10
G06F 13/16
G11C 5/02
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