09177611 cites 46 patents.

An apparatus includes a first semiconductor device including a three-dimensional (3D) memory. The 3D memory includes multiple memory cells arranged in multiple physical levels above a substrate. The 3D memory further includes circuitry associated with operation of the multiple memory cells. The apparatus includes a second semiconductor device coupled to the first semiconductor device. The second semiconductor device includes a charge pump, and the 3D memory does not include a charge pump.

Title
Smart bridge for memory core
Application Number
14/246650
Publication Number
9177611 (B2)
Application Date
April 7, 2014
Publication Date
November 3, 2015
Inventor
Deepak Pancholi
Bangalore
IN
Radhakrishnan Nair
Kerala
IN
Dimitris Pantelakis
Santa Clara
CA, US
Stephen Skala
Fremont
CA, US
Manuel Antonio D Abreu
El Dorado Hills
CA, US
Agent
Toler Law Group PC
Assignee
SANDISK TECHNOLOGIES
TX, US
IPC
G11C 29/04
G11C 16/26
G11C 16/10
G11C 14/00
G06F 11/10
G06F 13/16
G11C 5/02
G11C 11/34
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