An electrical interconnect between terminals on an IC device and contact pads on a printed circuit board (PCB). The electrical interconnect includes a substrate with a first surface having a plurality of openings arranged to correspond to the terminals on the IC device. A compliant material is located in the openings. A plurality of first conductive traces extend along the first surface of the substrate and onto the compliant material. The compliant material provides a biasing force that resists flexure of the first conductive traces into the openings. Vias extending through the substrate are electrically coupled the first conductive traces. A plurality of second conductive traces extend along the second surface of the substrate and are electrically coupled to a vias. The second conductive traces are configured to electrical couple with the contact pads on the PCB.