08531039 is referenced by 1 patents and cites 203 patents.

A microelectronic package includes a microelectronic element having faces and contacts, a flexible substrate overlying and spaced from a first face of the microelectronic element, and a plurality of conductive terminals exposed at a surface of the flexible substrate. The conductive terminals are electrically interconnected with the microelectronic element and the flexible substrate includes a gap extending at least partially around at least one of the conductive terminals. In certain embodiments, the package includes a support layer, such as a compliant layer, disposed between the first face of the microelectronic element and the flexible substrate. In other embodiments, the support layer includes at least one opening that is at least partially aligned with one of the conductive terminals.

Title
Micro pin grid array with pin motion isolation
Application Number
12/759196
Publication Number
8531039 (B2)
Application Date
April 13, 2010
Publication Date
September 10, 2013
Inventor
Teck Gyu Kang
San Jose
CA, US
David B Tuckerman
Lafayette
CA, US
Belgacem Haba
Saratoga
CA, US
Philip Damberg
Cupertino
CA, US
Agent
Lerner David Littenberg Krumholz & Mentlik
Assignee
Tessera
CA, US
IPC
H01L 29/40
View Original Source