08513813 is referenced by 30 patents and cites 160 patents.

A microelectronic element having a memory storage array has a front face facing away from a substrate of a microelectronic package, and is electrically connected with the substrate through conductive structure extending above the front face. First terminals are disposed at locations within first and second parallel grids of the package. The first terminals of each grid are configured to carry address information usable to determine an addressable memory location from among all the available addressable memory locations of the memory storage array. The first terminals in the first grid have signal assignments which are a mirror image of the signal assignments of the first terminals in the second grid.

Title
Stub minimization using duplicate sets of terminals for wirebond assemblies without windows
Application Number
13/440212
Publication Number
8513813 (B2)
Application Date
April 5, 2012
Publication Date
August 20, 2013
Inventor
Frank Lambrecht
Mountain View
CA, US
Belgacem Haba
Saratoga
CA, US
Wael Zohni
San Jose
CA, US
Richard Dewitt Crisp
Hornitos
CA, US
Agent
Lerner David Littenberg Krumholz & Mentlik
Assignee
Invensas Corporation
CA, US
IPC
H01L 23/52
H01L 23/48
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