08492295 cites 16 patents.

A semiconductor structure fabrication method. A provided structure includes: a semiconductor substrate, a transistor on the semiconductor substrate, N interconnect layers on the semiconductor substrate, and a temporary filling region within the N layers. N is at least 2. The temporary filling region is heated at a high temperature sufficiently high to result in the temporary filling material being replaced by a cooling pipes system that does not include any solid or liquid material. A first portion and a second portion of the cooling pipes system are each in direct physical contact with a surrounding ambient at a first interface and a second interface respectively such that a first direction perpendicular to the first interface is perpendicular to a second direction perpendicular to the second interface. A totality of interfaces between the cooling pipes system and the ambient consists of the first interface and the second interface.

Title
On-chip cooling for integrated circuits
Application Number
13/614273
Publication Number
8492295 (B2)
Application Date
September 13, 2012
Publication Date
July 23, 2013
Inventor
Richard Stephen Wise
Newburgh
NY, US
Michael Ray Sievers
Poughkeepsie
NY, US
Andres Fernando Munoz
Yonkers
NY, US
Kaushik A Kumar
Beacon
NY, US
Agent
Joseph Abate
Schmeiser Olsen & Watts
Assignee
International Business Machines Corporation
NY, US
IPC
H01L 21/76
H01L 21/26
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