08379498 is referenced by 12 patents and cites 25 patents.

Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.

Title
Systems and methods for track to track phase alignment
Application Number
13/186146
Publication Number
8379498 (B2)
Application Date
July 19, 2011
Publication Date
February 19, 2013
Inventor
Erich F Haratsch
Bethlehem
PA, US
Shaohua Yang
San Jose
CA, US
Ming Jin
Fremont
CA, US
George Mathew
San Jose
CA, US
Agent
Hamilton DeSanctis & Cha
Assignee
LSI Corporation
CA, US
IPC
G11B 5/09
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