08207975 is referenced by 10 patents and cites 18 patents.

One embodiment of the present invention sets forth a graphics pipeline architecture for optimizing graphics rendering efficiency by advancing the Z-test operation prior to shading operations whenever possible, as determined by an upstream pipeline configuration unit. Each processing engine within the graphics pipeline maintains independent state for both early Z-mode and late Z-mode operations and also may maintain state common to both modes. The processing engines receive work transactions that include a Z-mode flag indicating whether the work transaction should be processed in late Z-mode or early Z-mode. The Z-mode flag is also used to dynamically route any resulting outbound data, so that the appropriate data flow for either early Z or late Z processing is dynamically constructed for each work transaction. The shader engine is advantageously relieved of unnecessary work whenever possible by discarding occluded samples whose z-values are not altered by shading operations before they enter the shader engine.

Title
Graphics rendering pipeline that supports early-Z and late-Z virtual machines
Application Number
11/959441
Publication Number
8207975 (B1)
Application Date
December 18, 2007
Publication Date
June 26, 2012
Inventor
Mark J French
Raleigh
NC, US
Steven E Molnar
Chapel Hill
NC, US
Agent
Patterson & Sheridan
Assignee
NVIDIA Corporation
CA, US
IPC
G06T 15/60
G06T 15/50
G06T 1/20
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