One embodiment of the present invention sets forth a graphics pipeline architecture for optimizing graphics rendering efficiency by advancing the Z-test operation prior to shading operations whenever possible, as determined by an upstream pipeline configuration unit. Each processing engine within the graphics pipeline maintains independent state for both early Z-mode and late Z-mode operations and also may maintain state common to both modes. The processing engines receive work transactions that include a Z-mode flag indicating whether the work transaction should be processed in late Z-mode or early Z-mode. The Z-mode flag is also used to dynamically route any resulting outbound data, so that the appropriate data flow for either early Z or late Z processing is dynamically constructed for each work transaction. The shader engine is advantageously relieved of unnecessary work whenever possible by discarding occluded samples whose z-values are not altered by shading operations before they enter the shader engine.