08169025 is referenced by 37 patents and cites 17 patents.

A semiconductor device and fabrication method include a strained semiconductor layer having a strain in one axis. A long fin and a short fin are formed in the semiconductor layer such that the long fin has a strained length along the one axis. An n-type transistor is formed on the long fin, and a p-type transistor is formed on the at least one short fin. The strain in the n-type transistor improves performance.

Title
Strained CMOS device, circuit and method of fabrication
Application Number
12/689339
Publication Number
8169025 (B2)
Application Date
January 19, 2010
Publication Date
May 1, 2012
Inventor
Ghavam G Shahidi
Yorktown Heights
NY, US
Devendra K Sadana
Yorktown Heights
NY, US
Ali Khakifirooz
Albany
NY, US
Bruce B Doris
Yorktown Heights
NY, US
Kangguo Cheng
Albany
NY, US
Stephen W Bedell
Yorktown Heights
NY, US
Agent
Louis J Percello Esq
Tutunjian & Bitetto P C
Assignee
International Business Machines Corporation
NY, US
IPC
H01L 27/12
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