08076788 is referenced by 56 patents and cites 234 patents.

A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

Title
Off-chip vias in stacked chips
Application Number
12/941392
Publication Number
8076788 (B2)
Application Date
November 8, 2010
Publication Date
December 13, 2011
Inventor
Laura Mirkarimi
Sunol
CA, US
David Ovrutsky
San Jose
CA, US
Vage Oganesian
Palo Alto
CA, US
Ilyas Mohammed
Santa Clara
CA, US
Belgacem Haba
Saratoga
CA, US
Agent
Lerner David Littenberg Krumholz & Mentlik
Assignee
Tessera
CA, US
IPC
H01L 29/40
H01L 23/52
H01L 23/48
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