08064237 is referenced by 4 patents and cites 17 patents.

In one embodiment of the invention, a memory integrated circuit is provided including a memory array, a register, and control logic coupled to the register. The memory array in the memory integrated circuit stores data. The register includes one or more bit storage circuits to store one or more identity bits of an identity value. The control logic provides independent sub-channel memory access into the memory integrated circuit in response to the one or more identity bits stored in the register.

Title
Identifying and accessing individual memory devices in a memory channel
Application Number
12/974862
Publication Number
8064237 (B2)
Application Date
December 21, 2010
Publication Date
November 22, 2011
Inventor
Douglas Gabel
Hillsboro
OR, US
Kuljit S Bains
Olympia
WA, US
James Akiyama
Beaverton
OR, US
Peter MacWilliams
Aloha
OR, US
Agent
Blakely Sokoloff Taylor & Zafman
Assignee
Intel Corporation
CA, US
IPC
G11C 8/00
G11C 7/00
G11C 5/00
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