07962886 is referenced by 20 patents and cites 38 patents.

A method and system for generating design constraints for an electronic circuit design is disclosed. The method and system include reading a design description and an existing design constraint file, configuring design constraint integration rules, writing a new design constraint file, evaluating results of the new design constraint file, and replacing existing design constraint file with the new design constraint file.

Title
Method and system for generating design constraints
Application Number
11/952798
Publication Number
7962886 (B1)
Application Date
December 7, 2007
Publication Date
June 14, 2011
Inventor
Andy Lin
Saratoga
CA, US
Yee Wing Hsieh
Pleasanton
CA, US
Angela Krstic
San Diego
CA, US
Marcelo Glusman
San Jose
CA, US
Manish Pandey
San Jose
CA, US
Agent
Vista IP Law Group
Assignee
Cadence Design Systems
CA, US
IPC
G06F 17/50
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