07868679 is referenced by 3 patents and cites 13 patents.

A circuit is provided that includes an input for a clock signal, a random event generator for outputting a random signal, in particular random numbers, a settable delay device that is connected to the input for the clock signal and is connected to the random event generator for the purpose of setting a delay of an edge of the clock signal (clk) by means of the random signal.

Title
Circuit, method for receiving a signal, and use of a random event generator
Application Number
12/481249
Publication Number
7868679 (B2)
Application Date
June 9, 2009
Publication Date
January 11, 2011
Inventor
Tilo Ferchland
Dresden
DE
Jeannette Zarbock
Dresden
DE
Thorsten Riedel
Dresden
DE
Agent
Muncy Geissler Olds & Lowe PLLC
Assignee
Atmel Automotive
DE
IPC
H03H 11/26
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