07800415 is referenced by 10 patents and cites 18 patents.

In a particular embodiment, a circuit device includes a count zero circuit having a first counter to receive a clock signal and to produce a count zero signal based on the clock signal and having a second counter to generate a reset control signal to control a reset of the count zero circuit. The circuit device further includes a turnoff circuit to receive the clock signal and to produce a turn off signal based on the clock signal. Further, the circuit device includes a pulse width modulated (PWM) latch circuit adapted to produce a gate drive signal based on the count zero signal and the turn off signal, where timing of an edge of the gate drive signal varies based on the reset control signal.

Title
Circuit device to produce an output signal including dither
Application Number
12/337989
Publication Number
7800415 (B2)
Application Date
December 18, 2008
Publication Date
September 21, 2010
Inventor
Weikang Cheng
Milpitas
CA, US
Yeshoda Yedevelly
Sunnyvale
CA, US
Agent
R Michael Reed
Polansky & Associates P L L C
Assignee
Silicon Laboratories
TX, US
IPC
H03K 3/00
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