07723207 is referenced by 95 patents and cites 18 patents.

A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel and one layer attached to another to form a laminated 3D chip.

Title
Three dimensional integrated circuit and method of design
Application Number
11/737598
Publication Number
7723207 (B2)
Application Date
April 19, 2007
Publication Date
May 25, 2010
Inventor
Arifur Rahman
Freemont
CA, US
Mark A Lavin
Katonah
NY, US
David S Kung
Chappaqua
NY, US
Prabhakar N Kudva
New York
NY, US
Meikei Ieong
Wappingers Falls
NY, US
Kathryn W Guarini
Yorktown Heights
NY, US
Ibrahim M Elfadel
Ossining
NY, US
Syed M Alam
Cambridge
MA, US
Agent
Brian P Verminski Esq
Law Office of Charles W Peterson Jr
Assignee
International Business Machines Corporation
NY, US
IPC
H01L 21/30
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