07697326 is referenced by 105 patents and cites 324 patents.

A method for storing data in an array (28) of analog memory cells (32) includes defining a constellation of voltage levels (90A, 90B, 90C, 90D) to be used in storing the data. A part of the data is written to a first analog memory cell in the array by applying to the analog memory cell a first voltage level selected from the constellation. After writing the part of the data to the first analog memory cell, a second voltage level that does not belong to the constellation is read from the first analog memory cell. A modification to be made in writing to one or more of the analog memory cells in the array is determined responsively to the second voltage level, and data are written to the one or more of the analog memory cells subject to the modification.

Title
Reducing programming error in memory devices
Application Number
11/995806
Publication Number
7697326 (B2)
Application Date
May 10, 2007
Publication Date
April 13, 2010
Inventor
Ofir Shalvi
Ra'anana
IL
Naftali Sommer
Rishon Le Zion
IL
Agent
Darby & Darby P C
Assignee
Anobit Technologies
IL
IPC
G11C 16/04
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