07662722 is referenced by 10 patents and cites 9 patents.

A method is provided for fabricating a microelectronic chip which includes a passive device such, as an inductor, overlying an air gap. In such method, a plurality of front-end-of-line (“FEOL”) devices are formed in a semiconductor region of the microelectronic chip, and a plurality of stacked interlevel dielectric (“ILD”) layers are formed to overlie the plurality of FEOL devices, the plurality of stacked ILD layers including a first ILD layer and a second ILD layer, where the second ILD layer is resistant to attack by a first etchant which attacks the first ILD layer. A passive device is formed to overlie at least the first ILD layer. Using the first etchant, a portion of the first ILD layer in registration with the passive device is removed to form an air gap which underlies the passive device in registration with the passive device.

Title
Air gap under on-chip passive device
Application Number
11/626548
Publication Number
7662722 (B2)
Application Date
January 24, 2007
Publication Date
February 16, 2010
Inventor
Kunal Vaed
Poughkeepsie
NY, US
William J Murphy
North Ferrisburgh
VT, US
Jeffrey P Gambino
Westford
VT, US
Ebenezer E Eshun
Wappingers Falls
NY, US
Daniel C Edelstein
White Plains
NY, US
Timothy J Dalton
Ridgefield
CT, US
Douglas D Coolbaugh
Essex Junction
VT, US
Anil K Chinthakindi
Haymarket
VA, US
Anthony K Stamper
Williston
VT, US
Agent
Daryl K Neff
Lisa U Jaklitsch
Assignee
International Business Machines Corporation
NY, US
IPC
H01L 21/302
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