07551492 is referenced by 120 patents and cites 104 patents.

In a nonvolatile memory, less than a full block maybe erased as one or more pages. A select voltage is applied through pass transistors to each of plural selected wordlines and an unselect voltage is applied through pass transistor to each of plural unselected wordlines of a selected block. A substrate voltage is applied to the substrate of the selected block. A common select voltage may be applied to each selected wordline and the common unselect voltage may be applied to each unselected wordline. Select and unselect voltages may be applied to any of the wordlines of a select block. A page erase verify operation may be applied to a block having plural erased pages and plural nonerased pages.

Title
Non-volatile semiconductor memory with page erase
Application Number
11/715838
Publication Number
7551492 (B2)
Application Date
March 8, 2007
Publication Date
June 23, 2009
Inventor
Jin Ki Kim
Kanata
CA
Agent
Hamilton Brook Smith & Reynolds P C
Assignee
Mosaid Technologies
CA
IPC
G11C 16/04
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