07528494 is referenced by 174 patents and cites 6 patents.

A process of manufacturing a three-dimensional integrated circuit chip or wafer assembly and, more particularly, a processing of chips while arranged on a wafer prior to orienting the chips into stacks. Also disclosed is the manufacture of the three-dimensional integrated circuit wherein the chip density can be very high and processed while the wafers are still intact and generally of planar constructions.

Title
Accessible chip stack and process of manufacturing thereof
Application Number
11/266456
Publication Number
7528494 (B2)
Application Date
November 3, 2005
Publication Date
May 5, 2009
Inventor
Charles W Koburger III
Delmar
NY, US
David V Horak
Essex Junction
VT, US
Steven J Holmes
Guilderland
NY, US
Mark C Hakey
Fairfax
VT, US
Toshiharu Furukawa
Essex Junction
VT, US
Agent
Joseph Petrokaitis Esq
Scully Scott Murphy & Presser P C
Assignee
International Business Machines Corporation
NY, US
IPC
H01L 21/4763
H01L 21/00
H01L 29/40
H01L 23/52
H01L 23/48
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