07476589 is referenced by 37 patents and cites 9 patents.

A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode.

Title
Methods for forming shielded gate field effect transistors
Application Number
11/479117
Publication Number
7476589 (B2)
Application Date
June 29, 2006
Publication Date
January 13, 2009
Inventor
Rodney Ridley
Scarborough
ME, US
Nathan Lawrence Kraft
Pottsville
PA, US
Thomas E Grebs
Mountain Top
PA, US
Agent
Townsend and Townsend and Crew
Assignee
Fairchild Semiconductor Corporation
ME, US
IPC
H01L 21/4763
H01L 21/336
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