07410879 is referenced by 18 patents and cites 4 patents.

A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. First and second portions of a first dielectric material are formed over the resistor protect layer over the first and second ends of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the first dielectric material as a hard mask. Then a second dielectric layer is deposited. A first via mask and etch process is used to etch vias down to the underlying portions of the resistor protect layer over the ends of the thin film resistor. A second via mask and etch process is used to etch substrate vias to an underlying conductor layer.

Title
System and method for providing a dual via architecture for thin film resistors
Application Number
11/196787
Publication Number
7410879 (B1)
Application Date
August 3, 2005
Publication Date
August 12, 2008
Inventor
Terry L Lines
Mansfield
TX, US
Michael Burger
Arlington
TX, US
Victor Torres
Irving
TX, US
Rodney Hill
Mansfield
TX, US
Assignee
National Semiconductor Corporation
CA, US
IPC
H01L 21/20
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