07301180 is referenced by 8 patents and cites 133 patents.

The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate.

Title
Structure and method for a high-speed semiconductor device having a Ge channel layer
Application Number
10/173986
Publication Number
7301180 (B2)
Application Date
June 18, 2002
Publication Date
November 27, 2007
Inventor
Eugene A Fitzgerald
Windham
NH, US
Christopher W Leitz
Nashua
NH, US
Minjoo L Lee
Cambridge
MA, US
Agent
Goodwin Procter
Assignee
Massachusetts Institute of Technology
MA, US
IPC
H01L 31/0328
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