07227918 is referenced by 29 patents and cites 76 patents.

A programmable logic device (“PLD”) is augmented with programmable clock data recover (“CDR”) circuitry to allow the PLD to communicate via any of a large number of CDR signaling protocols. The CDR circuitry may be integrated with the PLD, or it may be wholly or partly on a separate integrated circuit. The circuitry may be capable of CDR input, CDR output, or both. The CDR capability may be provided in combination with other non-CDR signaling capability such as non-CDR low voltage differential signaling (“LVDS”). The circuitry may be part of a larger system.

Title
Clock data recovery circuitry associated with programmable logic device circuitry
Application Number
9/805843
Publication Number
7227918 (B2)
Application Date
March 13, 2001
Publication Date
June 5, 2007
Inventor
Chong Lee
San Ramon
CA, US
Rakesh Patel
Cupertino
CA, US
John Turner
Santa Cruz
CA, US
Paul Butler
Mesa
AZ, US
Henry Lui
San Jose
CA, US
Edward Aung
San Leandro
CA, US
Agent
Michael J Chasan
Robert R Jackson
Fish & Neave IP Group Ropes & Gray
Assignee
Altera Corporation
CA, US
IPC
H04L 7/00
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