07216204 is referenced by 59 patents and cites 345 patents.

Stored units of information related to packet processing are associated with identifiers, each of which is maintained as an entry in a Content Addressable Memory (CAM). Each entry includes status information associated with the information unit with which the identifier is associated. The status information is used to determine validity of the information unit with which the status information is associated.

Title
Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
Application Number
10/212548
Publication Number
7216204 (B2)
Application Date
August 5, 2002
Publication Date
May 8, 2007
Inventor
Debra Bernstein
Sudbury
MA, US
Gilbert Wolrich
Framingham
MA, US
Mark B Rosenbluth
Uxbridge
MA, US
Agent
Fish & Richardson P C
Assignee
Intel Corporation
CA, US
IPC
G06F 12/00
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