07189596 is referenced by 97 patents and cites 28 patents.

A method of fabricating microelectronic dice by providing or forming a first encapsulated die assembly and a second encapsulated die assembly. Each of the encapsulated die assemblies includes at least one microelectronic die disposed in a packaging material. Each of the encapsulated die assemblies has an active surface and a back surface. The encapsulated die assemblies are attached together in a back surface-to-back surface arrangement. Build-up layers are then formed on the active surfaces of the first and second encapsulated assemblies, preferably, simultaneously. Thereafter, the microelectronic dice are singulated, if required, and the microelectronic dice of the first encapsulated die assembly are separated from the microelectronic dice of the second encapsulated die assembly.

Title
Process for forming a direct build-up layer on an encapsulated die packages utilizing intermediate structures
Application Number
9/661899
Publication Number
7189596 (B1)
Application Date
September 14, 2000
Publication Date
March 13, 2007
Inventor
Steven Towle
Sunnyvale
CA, US
Quat Vu
Santa Clara
CA, US
Qing Ma
San Jose
CA, US
Chun Mu
Saratoga
CA, US
Agent
Schwegman Lundberg Woessner & Kluth P A
Assignee
Intel Corporation
CA, US
IPC
H01L 21/48
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