07171507 is referenced by 7 patents and cites 36 patents.

A hard disk controller having a latency-independent interface comprises a data gate circuit that transmits a data gate signal. A data circuit transmits or receives data under control of the data gate signal. A media gate circuit transmits a media gate signal. A mode selection circuit transmits mode selection information under control of the media gate signal, wherein said data gate signal controls the transfer of data between the hard disk controller and a read/write channel in accordance with the media gate signal.

Title
High latency interface between hardware components
Application Number
10/962321
Publication Number
7171507 (B2)
Application Date
October 12, 2004
Publication Date
January 30, 2007
Inventor
Saeed Azimi
Union City
CA, US
Assignee
Marvell International
BM
IPC
G06F 13/14
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