07165200 is referenced by 7 patents and cites 6 patents.

A system and method are disclosed for characterizing a signal path. The system includes a system clock configured to produce a system clock signal at a sample frequency. A frequency divider is configured to divide the sample frequency of the system clock signal by a factor of N to produce a chip clock signal at a chip frequency. The system further includes a pseudo-noise (PN) sequence generator configured to produce a PN sequence at the chip frequency and couple the PN sequence to the signal path while the signal path is carrying an operational signal. A sub-chip sampler is configured to correlate the PN sequence and a reflected PN sequence which has been reflected within the signal path to form a correlated signal and to sample the correlated signal at the sample frequency of the system clock signal.

Title
System and method for characterizing a signal path using a sub-chip sampler
Application Number
11/124458
Publication Number
7165200 (B2)
Application Date
May 5, 2005
Publication Date
January 16, 2007
Inventor
Cynthia M Furse
Salt Lake City
UT, US
Anurag Nigam
Aurangabad
IN
Nilay D Jani
Salt Lake City
UT, US
Agent
Thorp North & Western
Assignee
University of Utah Research Foundation
UT, US
IPC
G01R 31/28
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