07152215 is referenced by 239 patents and cites 63 patents.

A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical polishing (CMP) processing of films in integrated circuit manufacturing processes. The described methods use process variation and electrical impact to direct the insertion of dummy fill into an integrated circuit.

Title
Dummy fill for integrated circuits
Application Number
10/164847
Publication Number
7152215 (B2)
Application Date
June 7, 2002
Publication Date
December 19, 2006
Inventor
David White
Cambridge
MA, US
Vikas Mehrotra
Fremont
CA, US
Taber H Smith
Fremont
CA, US
Agent
Fish & Richardson P C
Assignee
Praesagus
MA, US
IPC
G06F 17/50
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