07111296 is referenced by 33 patents and cites 214 patents.

A parallel hardware-based multithreaded processor is described. The processor includes a general purpose processor that coordinates system functions and a plurality of microengines that support multiple program threads. The processor also includes a memory control system that has a first memory controller that sorts memory references based on whether the memory references are directed to an even bank or an odd bank of memory and a second memory controller that optimizes memory references based upon whether the memory references are read references or write references. A program thread communication scheme for packet processing is also described.

Title
Thread signaling in multi-threaded processor
Application Number
10/615280
Publication Number
7111296 (B2)
Application Date
July 8, 2003
Publication Date
September 19, 2006
Inventor
William Wheeler
Southboro
MA, US
Matthew J Adiletta
Worc
MA, US
Donald Hooper
Shrewsbury
MA, US
Debra Bernstein
Sudbury
MA, US
Gilbert Wolrich
Framingham
MA, US
Agent
Fish & Richardson P C
Assignee
Intel Corporation
CA, US
IPC
G06F 9/46
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