07082519 is referenced by 61 patents and cites 37 patents.

A system and method for enabling multithreading in a embedded processor, invoking zero-time context switching in a multithreading environment, scheduling multiple threads to permit numerous hard-real time and non-real time priority levels, fetching data and instructions from multiple memory blocks in a multithreading environment, and enabling a particular thread to modify the multiple states of the multiple threads in the processor core.

Title
System and method for instruction level multithreading scheduling in a embedded processor
Application Number
10/263068
Publication Number
7082519 (B2)
Application Date
October 1, 2002
Publication Date
July 25, 2006
Inventor
David A Fotland
San Jose
CA, US
Tibet Mimaroglu
Sunnyvale
CA, US
Christopher J F Waters
Palo Alto
CA, US
Nicholas J Kelsey
Mountain View
CA, US
Agent
Fenwick & West
Assignee
Ubicom
CA, US
IPC
G06F 9/38
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