07060632 is referenced by 14 patents and cites 315 patents.

Methods for fabricating multi-layer semiconductor structures including strained material layers using a minimum number of process tools and under conditions optimized for each layer. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Title
Methods for fabricating strained layers on semiconductor substrates
Application Number
10/389003
Publication Number
7060632 (B2)
Application Date
March 14, 2003
Publication Date
June 13, 2006
Inventor
Matthew Currie
Windham
NH, US
Eugene Fitzgerald
Windham
NH, US
Agent
Goodwin Procter
Assignee
AmberWave Systems Corporation
NH, US
IPC
H01L 21/31
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