07060526 is referenced by 57 patents and cites 70 patents.

A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.

Title
Wafer level methods for fabricating multi-dice chip scale semiconductor components
Application Number
10/730333
Publication Number
7060526 (B2)
Application Date
December 8, 2003
Publication Date
June 13, 2006
Inventor
Pete A Benson
Boise
ID, US
Kyle K Kirby
Boise
ID, US
David R Hembree
Boise
ID, US
James M Wark
Boise
ID, US
William M Hiatt
Eagle
ID, US
Alan G Wood
Boise
ID, US
Warren M Farnworth
Nampa
ID, US
Agent
Stephen A Gratton
Assignee
Micron Technology
ID, US
IPC
H01L 21/44
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