07005351 is referenced by 62 patents and cites 11 patents.

A method for fabricating a transistor configuration including at least one trench transistor cell has a gate electrode and a field electrode disposed in a trench below the gate electrode. The trenches are formed in a semiconductor substrate. A drift zone, a channel zone, and a source zone are in each case provided in the semiconductor substrate. According to the invention, the source zone and/or the channel zone are formed at the earliest after the introduction of the trenches into the semiconductor substrate by implantation and diffusion.

Title
Method for fabricating a transistor configuration including trench transistor cells having a field electrode, trench transistor, and trench configuration
Application Number
10/392024
Publication Number
7005351 (B2)
Application Date
March 19, 2003
Publication Date
February 28, 2006
Inventor
Heimo Hofer
Fuernitz
AT
Martin Pölzl
Ossiach
AT
Walter Rieger
Arnoldstein
AT
Joachim Krumrey
München
DE
Franz Hirler
Isen
DE
Ralf Henninger
München
DE
Agent
Gregory L Mayback
Werner H Stemer
Laurence A Grenberg
Assignee
Infineon Technologies
DE
IPC
H01L 21/336
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